During the formation of a semiconductor device many features such as conductors, electrical contacts, and other physical features are commonly formed from, into, and over a semiconductor wafer. A goal of semiconductor device engineers is to form as many of these features in a given area as possible to increase yield percentages and to decrease device size and manufacturing costs.
Heterogeneous structures on a semiconductor wafer are typically formed using lithography. Photolithography, the lithographic method most used in leading-edge wafer processing, comprises projecting coherent light of a given wavelength from an illumination source through a quartz photomask or reticle having a chrome pattern thereon, and imaging that pattern onto a photoresist-coated wafer. The light chemically alters the photoactive photoresist and allows the exposed photoresist (if positive resist is used) or the unexposed photoresist (if negative resist is used) to be rinsed away using a developer.
Generally, photolithography is a multi-step process including the application of a photoresist material to the surface of an in-process wafer, exposure of such material by a coherent light through a mask or reticle, and development of the exposed material, resulting in the desired patterning. Initially, photoresist material is applied to the surface of a wafer through processes known in the art, for example by a spin-on process. The wafer is then baked, hardening the resist and then exposed to a light source. Following, exposure, the wafer is subjected to a post exposure bake. A develop/rinse step follows, resulting in the removal of exposed (positive) or unexposed (negative) resist. The wafer is then dried by methods known in the art, for example by spin drying and then subjected to an after develop inspection (“ADI”).
With decreasing feature sizes, the limits of photolithography are continually being tested and lithographic methods and materials are continually being improved through various developments such as resolution enhancement techniques, for instance immersion photolithography. As feature sizes continue to decrease, reduction of defect modes becomes increasingly important because tolerances are minimized with miniaturization of device features. It is well established that physical defects which have little impact on larger device features may result in nonfunctional devices when formed at smaller dimensions.
During ADI, a defect known as a watermark-type defect is often identified. This defect is likely an aberration which remains on the photoresist surface after standard dry or, immersion photolithographic processing. The defect likely results from materials, such as water used during the develop/rinse step, remaining on the resist surface. The appearance of a watermark-type defect likely depends on the probability that such materials will remain on the resist surface following the photolithographic process. The presence of such a defect can result in anomalies during subsequent processing, for example blocked etch, missing implant and/or undesirable topography, which may lead to lower yields and decreased device performance.
Accordingly, there is a need for improved photolithographic techniques to reduce or eliminate watermark-type defects.
It should be emphasized that the drawings herein may not be to exact scale and are schematic representations. The drawings are not intended to portray the specific parameters, materials, particular uses, or the structural details of the invention, which can be determined by one of skill in the art by examination of the information herein.